Security
DRAM Address Manipulation Attack Bypasses CPU Memory Isolation on AMD Processors
A new hardware security exploit reveals how malicious kernel code can alter memory controller settings to access protected system regions that should be off-limits even to privileged software.
InfoQ
Security researcher Christopher Domas has released skitter-creek-bath-salts, an open-source tool demonstrating a fundamental vulnerability in how AMD CPUs isolate memory. The attack exploits the memory controller—the hardware component that translates logical memory addresses into physical DRAM locations—to circumvent security boundaries that should protect sensitive kernel and firmware code from unauthorized access.
How the Attack Works#
The exploit operates by reconfiguring memory controller translation registers, specifically settings like BankSwizzleMode that determine how the controller calculates which DRAM bank, row, and column a physical address maps to. Modern CPU security relies on the assumption that physical addresses map consistently to DRAM locations. Security mechanisms like hypervisor page tables, System Management Mode (SMM) protections, and Platform Security Processor (PSP) enclaves all enforce access controls at higher layers of the memory hierarchy—before requests reach the memory controller.
By changing how the controller performs this translation, an attacker can make a single physical address resolve to different DRAM locations. Since upstream security checks only validate the untranslated address, the controller silently routes memory access into protected regions that should be inaccessible.
Technical Implementation#
The attack requires Ring 0 kernel-level privileges and involves a sophisticated multi-stage approach. Domas's toolchain disables interrupts, offlines CPU cores, flushes caches, and uses automated probing to discover which address bits collide under different controller configurations. Advanced techniques including Galois Field arithmetic and SMT solver algorithms reverse-engineer the exact bitwise mapping between physical addresses and DRAM locations. Once the mapping is resolved, targeted memory operations can read and write to previously protected areas including SMM RAM, PSP firmware tables, and processor sleep save regions.
Security Implications and Limitations#
The discovery exposes a critical architectural blind spot: security boundaries enforced above the memory controller remain ineffective if the controller itself can dynamically remap addresses. This poses substantial risks to bare-metal cloud environments and confidential computing platforms where untrusted code might gain kernel access.
However, the exploit's practical scope is limited. It requires full kernel-level control, and Domas notes that primary targets are older AMD Family 15h and 16h processors, where these registers are accessible. The security community has responded with significant interest on platforms like and , alongside coverage on podcasts like .

